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T2M MIPI MIPI CSI-3 Host v1.1 Controller IP

MIPI CSI-3 Host v1.1 Controller IP

Description and Features

The MIPI Camera Serial Interface 3 (CSI-3) is an interface between a Camera and a host processor baseband application engine. This interface, defined by MIPI Alliance, uses UniPro and MPHY for Link and PHY layers respectively. CSI-3 Host is the command encoding and pixel decoding logic between the Application processor and UniPro . CSI-3 Host IP supports two C-Ports for pixel data and one C-Port for attribute transfer. In the CSI-3 Host, the pixel data from UniPro, along with CDP data is processed at C port level, and subsequently the image is processed before being sent to the Application Processor. The control flow, being opposite to data flow, is initiated by the application processor, to configure UniPro , and M PHYs downstream in both Host and Device sides, and also CSI-3 Device. The MIPI CSI-3 Host along with MIPI UniPro, M PHY and MIPI CSI-3 Device provide a complete solution for a camera application.


  • Compliant with MIPI CSI-3 Spec v1 .1
  • YUV 420 (8 & 10-bit), YUV 422 (8&10-bit), RGB(888, 666, 565, 555, 444),
  • RAW(6, 7, 8, 10, 12, 14-bit) and
  • Compressed Image formats supported
  • 1 C-port for CPC and 2 C-ports for Pixel/Embedded Data
  • CPC GET/SET/Notify/Response PDU supported .
  • Mandatory Get table/set table properties of all attributes .
  • End to end Support for CPC Packets .
  • Round Robin arbitration for multiple VCIDs.
  • Tx Buffer Over flow Management
  • Preemptive frame handling
  • Embedded data during Vertical Blanking period supported


  • Configurable RTL Code
  • HDL-based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers, and performance monitors
  • Configurable synthesis shell
  • Documentation
  • Design guide
  • Verification guide
  • Synthesis guide
  • FPGA Validation
  • Highly Modular and Scalable Design
  • Active Low Asynchronous Reset
  • Automotive
  • Wearables
  • Consumer