Production Proven, Complex Semiconductor IP Cores

Semiconductor IP Cores

T2M ADC 14b-4.32Gsps ADC IP Core

14b-4.32Gsps ADC IP Core

Description and Features

This ultra high speed wide-band Analog-to-Digital Converter is based on 16 Time Interleaved Pipeline sub-ADC followed by a digital correction algorithm for gain, offset and skew correction. The differential input is terminated by a 100 Ohms resistor (100 Ohms differential) and followed by an input buffer driving the sub-ADC. The signal amplitude is 1Vpp differential. The analog source driving the ADC should be ac-coupled to the input pins with two external capacitors of 1nF minimum. The input common mode is generated internally.



Features and dele are same