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T2M MIPI MIPI RFFE SPI I2C Slave Controller IP

MIPI RFFE SPI I2C Slave Controller IP

Description and Features

MIPI RFFE SPI I2C Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI and I2C overlay, compatible with RFFE, SPI and I2C specification. Through its RFFE compatibility, it provides a simple interface to a wide range of low-cost devices. MIPI RFFE SPI I2C Slave IP is proven in multiple ASIC. The host interface of the MIPI RFFE/SPI/12C can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.



  • Supports 2.0 MIPI RFFE Specification
  • Supports SPI Block Guide V04.01 Specification
  • Full MIPI RFFE Slave functionality
  • Supports following frames • Command Frame • Data/Address Frame • No Response Frame
  • Supports extended register read/writes
  • Supports device enumeration
  • Supports Low power modes
  • Supports half speed
  • Full SPI Slave functionality
  • Supports following frames for SPI • Sleep Frame • Wakeup Frame • Write Frame • Read Frame
  • Supports 8 bit and 16 bit address for SPI
  • Support single and burst transfer mode for SPI
  • Supports I2C version 2.1 specification
  • Full I2C Slave transmit and receive Functionality
  • Supports Start, repeat start and stop for all possible transfers for I2C
  • Supports 7b/10b Addressing for I2C
  • Supports following speed modes for I2C • Standard mode • Fast mode • High speed mode
  • Supports clock stretching for I2C
  • Supports General call address handling for I2C
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/micro-controller devices.


  • The MIPI RFFE SPI I2C Slave interface is available in Source and netlist products.
  • The Source product is delivered in plain text Verilog. If needed VHDL, SystemC code can also be provided.
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • IP-XACT RDL generated address map
  • Firmware code and Linux driver package
  • Documentation contains User's Guide and Release notes.