Production Proven, Complex Semiconductor IP Cores

Semiconductor IP Cores


HDMI 2.1 Tx PHY IP in 28HPC+

Description and Features

The HDMI V2.1 Tx complies with version 2.1 of the HDMI specification and offers a full single-link HDMI transmitter capability. It is made up of two modules: a link module and a physical layer. The connection module is implemented as a synthesizable soft IP, but the PHY is upper compatible with DVI transmitter and implemented as a hard IP. The transmission of audiovisual contents is secured by an integrated High band width Digital Content Protection (HDCP) encryption function.

  • HDMI version 2.1 compliant transmitter and sink function
  • Supports Dynamic HDR, FRL, VRR and Fast Vactive
  • Wide range channel speed up to 12Gbps
  • HDCP revision 1.4/2.2 compliant content protection
  • Supports FRL (EMpacket), 3Lane (3Gbps / 6Gbps) / 4Lane (6Gbps / 8Gbps)
  • Supports CTA-861G / VESA DMT
  • Supports dynamic HDR, FRL, VRR, Fast Vactive
  • Supports ITU-R BT.601 / 709/2020 Non Const / RGB Full / RGB Limit / xvYCC Convert color space
  • Data rate up to 12 Gbps
  • Adjustable PLL characteristics, transmitter swing voltage, pre-emphasis, etc.
  • Achieves small ISI jitter with fully differential data paths
  • Programmable PLL characteristics, transmitter swing voltage, and pre-emphasis
  • Silicon Proven in TSMC 28HPC+


  • Configurable RTL Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performancemonitors
  • Configurable synthesis shell
  • Documentation
  • Design Guide
  • Verification Guide
  • Synthesis Guide


  • Testability:
  • Loop-back test
  • PLL only test
  • Built-In-Self-Test
  • Process:
  • TSMC28nm HPC+ 1.8v/0.9v
  • Digital TV
  • Tablets
  • Mobile phones
  • Digital camera
  • Camcorders
  • Soundbars
  • Audio/Video Receivers
  • DVD players
  • Recorders
  • Streaming-media players
  • Set-top boxes
  • Home theater systems
  • Game consoles